F206N - 3U CompactPCI® Nios® II Slave Board

Memory

512 bytes instruction cache and 512 bytes data cache integrated in Nios® II

32MB SDRAM system memory
• Soldered
• 133MHz memory bus frequency

2MB boot Flash

I/O

One RS232 UART (COM10)
• D-Sub connector at front panel
• Data rates up to 115.2kbit/s
• 60-byte transmit/receive buffer
• Handshake lines: full support
• For debugging

Three 10-pin connectors
• For FPGA-controlled functions
• For use of one additional SA-Adapter™
• One receptacle for direct SA-Adapter™ connection at the front
• Two receptacles for direct connection of long SA-Adapters™ at the front (instead of short SA-Adapters™)
• Different physical layers through SA-Adapters™: RS232, RS422, RS485, Ethernet, CAN bus, binary I/O

FPGA

Standard factory FPGA configuration:
• Nios® II soft processor
• 16Z014_PCI - PCI to Wishbone interface
• 16Z052_GIRQ - Global Interrupt Controller (Nios®)
• 16Z052_GIRQ - Global Interrupt Controller (CPU)
• 16Z069_RST - Reset Controller
• 16Z043_SDRAM - SDRAM controller (32MB)
• 16Z045_FLASH - Flash interface
• 16Z025_UART - UART controller (controls COM10)

The FPGA offers the possibility to add customized I/O functionality. See FPGA.

Miscellaneous

Four user LEDs, FPGA-controlled

Local PCI Bus

32-bit/33-MHz, 3.3V V(I/O)

Compliant with PCI Specification 2.2

CompactPCI® Bus

Compliance with CompactPCI® Core Specification PICMG 2.0 R3.0

Peripheral slot

32-bit/33-MHz PCI

V(I/O): +3.3V

Only one slot required on 3U CompactPCI® backplane

More supplementary CompactPCI® slots required depending on SA-Adapters™

Electrical Specifications

Supply voltage/power consumption:
• +5V (-3%/+5%), current depends only on mounted SA-Adapters™
• +3.3V (-3%/+5%), 500mA typ.

MTBF: 308,000h @ 40°C (derived from MIL-HDBK-217F)

Mechanical Specifications

Dimensions: conforming to CompactPCI® specification for 3U boards

Single 3U front panel slot for up to two 9-pin D-Sub connectors

Weight: 165g

Environmental Specifications

Temperature range (operation):
• -40..+85°C (qualified components)
• Airflow: min. 10m³/h

Temperature range (storage): -40..+85°C

Relative humidity (operation): max. 95% non-condensing

Relative humidity (storage): max. 95% non-condensing

Altitude: -300m to + 3,000m

Shock: 15g/11ms

Bump: 10g/16ms

Vibration (sinusoidal): 2g/10..150Hz

Conformal coating on request

Safety

PCB manufactured with a flammability rating of 94V-0 by UL recognized manufacturers

EMC

Tested according to EN 55022 (radio disturbance), IEC1000-4-2 (ESD) and IEC1000-4-4 (burst)

Software Support

Nios® sample design for Quartus® II development tools

Flash update tools for Windows®, Linux, VxWorks®

Driver software depending on implemented FPGA functions

For more information on supported operating system versions and drivers see Downloads.

Flexible Configuration

Customized I/O functions can be added to the FPGA.

It depends on the board type, pin counts and number of logic elements which IP cores make sense and/or can be implemented. Please contact MEN for information on feasibility.

You can find more information on our web page "User I/O in FPGA"

FPGA Capabilities

FPGA Altera® Cyclone® EP1C12 (optional EP1C20)
• 12,060 logic elements
• 239,616 total RAM bits
• Logic elements of Nios® II soft processor (standard version): approx. 3500

Connection
• Functions can be linked to Wishbone or Avalon® bus
• Available pin count: 79 I/O lines
• Functions available via I/O connectors
• SA-Adapters™ can be used to realize the physical lines.

MEN offers an FPGA Development Package as well as Flash update tools for different operating systems.

MEN IP Cores

MEN offers a large number of standard IP cores.

Examples:
• IDE (e.g. PIO mode 0, UDMA mode 5)
• UARTs
• CAN bus
• Display control
• Fast Ethernet (10/100Base-T)
• ...

For IP cores developed by MEN please refer to our IP core overview.
• IP Core compare chart (PDF)

MEN also offers development of new (customized) IP cores.

Third-Party IP Cores

Third-party IP cores can also be used in combination with MEN IP cores.

Examples:
• www.altera.com
• www.opencores.org

FPGA Design Environment

Altera® offers free download of Quartus® II Web Edition
• Complete environment for FPGA and CPLD design
• Includes schematic- and text-based design entry
• Integrated VHDL and Verilog HDL synthesis and support for third-party synthesis software
• SOPC Builder system generation software
• Place-and-route, verification, and programming

Altera® Quartus® II Web Edition FPGA design tool

One 40-pin plug for onboard connection of up to four additional SA-Adapters™ via ribbon cable (on request)

Different physical layers via SA-Adapter™ controlled by FPGA

FPGA

Customized IP core functions configurable by customer or MEN

Mechanical

4, 8 or 12HP front panel dependent on number of SA-Adapters™ ( 8 or 12HP on request)

One-piece front panel

Different front panel cut-outs for audio, USB etc.

Cooling Concept

Also available with conduction cooling in MEN CCA frame

Please note that some of these options may only be available for large volumes. Please ask our sales staff for more information.

Article No.	Description	More
FPGA
16F206N00	Nios®-CompactPCI® Open Platform FPGA Development Package (MEN) (without Altera® Quartus® II) (license not included in F206N)	Download Details
Linux
This product is designed to work under Linux. See below for potentially available separate software packages from MEN.
13Z025-90	Linux native driver (MEN) for 16Z025_UART, 16Z057_UART and 16Z125_UART	Download Details
13Z100-91	Linux FPGA update tool (MEN)	Download Details
Windows
This product is designed to work under Windows®. See below for potentially available separate software packages from MEN.
13Z100-70	Windows® FPGA update tool (MEN)	Download Details
VxWorks
This product is designed to work under VxWorks®. For details regarding supported/unsupported board functions please refer to the corresponding software data sheets.
13Z025-60	VxWorks® native driver (MEN) for 16Z025_UART, 16Z057_UART and 16Z125_UART	Download Details
13Z100-60	VxWorks® FPGA update tool (MEN)	Download Details

For operating systems not mentioned here contact MEN sales.