F50P - 3U CompactPCI® PlusIO MPC8548 SBC
Standard Configurations
|
|
CPU Type | System RAM / FRAM |
|
Front I/O | Rear I/O |
|
Front Panel | Op. Temp. |
|
|
|
MPC8548, 1.33 GHz | 512 MB ECC / 128 KB |
|
2 USB / 2 ETH | 4 USB / 2 SATA |
|
8 HP |
|
|
|
|
MPC8548, 1.33 GHz | 512 MB ECC / 128 KB |
|
1 USB client | 4 USB / 2 ETH / 16 GPIO / 4 UARTs |
|
9 HP |
|
|
Options
CPU
Several PowerQUICC™ III types with different clock frequencies
MPC8548 or MPC8548E
•
1 GHz, 1.2 GHz, 1.33 GHz or 1.5 GHz
MPC8543 or MPC8543E
•
800 MHz or 1 GHz
Memory
System RAM
•
512 MB, 1 GB or 2 GB
•
With or without ECC
Flash Disk
•
2 GB, 4 GB, 6 GB, 8 GB, 12 GB or 16 GB
FRAM
•
0 KB or 128 KB
Additional SDRAM
•
0 MB or 32 MB
•
With optional FPGA
I/O
See interface configuration matrix showing possible I/O combinations (PDF)
VGA at front (with optional FPGA)
Ethernet
•
Up to two channels at front
•
Up to three channels at rear
•
Only two channels total with MPC8543
SATA
•
Up to two channels at rear
Up to 64 user-defined I/O lines
•
With optional FPGA, see below
•
Reduces number of Ethernet/SATA channels
FPGA
The optional onboard FPGA offers the possibility to implement customized I/O functionality.
FPGA Altera® Arria® GX AGX35C
•
33,520 logic elements
•
1,348,416 total memory bits
•
Connected to CPU via PCI Express® x1 link
Connection
•
Available pin count: 64 pins
•
Functions available via rear I/O J2 connector
Please note that the FPGA expands the board's width by 4 HP, to 12 HP!
•
See also F50P front panel diagram
You can find more information on our web page "User I/O in FPGA"
Cooling concept
-40..+70°C on 8 HP with heat sink (without FPGA) for convection cooling
Conduction cooled variety F50C also available, for -40..+85°C
Please note that some of these options may only be available for large volumes. Please ask our sales staff for more information.
» Stay up to date with our RSS feeds