P699 - USM™ Main XMC

FPGA

Flexible Configuration

This MEN board offers the possibility to add customized I/O functionality in FPGA.

It depends on the board type, pin counts and number of logic elements which IP cores make sense and/or can be implemented. Please contact MEN for information on feasibility.

You can find more information on our web page "User I/O in FPGA"

FPGA Capabilities

FPGA Altera® Cyclone® III EP3C25
• 24,624 logic elements
• 594 Kbits total RAM
• Supports Nios® II soft processor

Connection
• Functions can be linked to Wishbone bus
• Available pin count: 46 pins (FPGA to USM™)
• Functions available via USM™ at front I/O connector

Functional updates via software
• MEN offers Flash update tools for different operating systems.