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Tailored I/O functions realized as IP cores for configuration in onboard FPGAs MDIS5 driver (MEN) for 16Z034_GPIO and 16Z037_GPIO

13Z017-06 MDIS5™ driver (MEN) for 16Z034_GPIO and 16Z037_GPIO

Version

Current release: See history

Last modified: See history

Features
MEN MDIS

Supported Operating System

Linux

VxWorks®

QNX®

OS-9®

Supported IP Cores

MEN's 16Z034_GPIO IP Core

MEN's 16Z037_GPIO IP Core

MEN's 16Z127_GPIO IP Core

Supported MEN Boards

A14C, A17

D6, D7

EM1, EM1A, EM1N, EM3, EM3A, EM8, EM8A, EM9

F12, F12N, F13

F215, F216

P598, P599, P699

P507

MM1

Features

8-bit general purpose I/O (16Z034/16Z037)

32-bit general purpose I/O (16Z127)

Data direction programmable for every I/O port

State of output port pins readable

Ability to generate interrupts on rising, falling or both edges on port

Every port can work in open drain mode

Hardware debouncing possible for every port

Included Documentation

HTML Documentation

Notes

This MDIS5™ low-level driver is compatible with MDIS4™ system packages.

Requires MDIS4™ or MDIS5™ system package

Main Software
Article No. Description More
13Z017-06MDIS5™ low-level driver sources (MEN) for 16Z034_GPIO and 16Z037_GPIO
Requires an MDIS4™/2004 or MDIS5™ system package
Download
Details
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