P518 - Frame Buffer Interface PMC

FPGA

Flexible Configuration

This MEN board offers the possibility to add customized I/O functionality in FPGA.

It depends on the board type, pin counts and number of logic elements which IP cores make sense and/or can be implemented. Please contact MEN for information on feasibility.

You can find more information on our web page "User I/O in FPGA"

FPGA Capabilities

FPGA Altera® Cyclone® EP1C12
• 12,060 logic elements
• 239,616 total RAM bits

Configuration data stored in 2MB Flash

MEN offers Flash update tools for different operating systems.

FPGA Packages