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16Z050_BIO - BIOC Binary I/O Controller

FPGA IP Core

The Binary I/O Controller (BIOC) provides programmable binary input/output functionality.

Download data sheet

Main Features

  • FPGA IP Core
  • Programmable binary input/output
  • Wishbone bus interface
16Z050_BIO Product Image

Technical Data

Size
  • Logic elements (Altera Cyclone device family): 700 (for 16 independent digital outputs and 16 independent digital inputs)
  • Pin count min: 4
  • Pin count max: depending on number of units and channels
  • RAM: 4 x 4096 bits
System-Bus Interface
  • Wishbone bus interface compliant with Wishbone Specification B.3
  • 32-bit data transfer, 33MHz bus frequency
  • Supported Wishbone bus cycles
    • Single read/write
Functionality
  • Binary I/O
  • The number of digital inputs/ouputs can be set with a VHDL-GENERIC parameter
  • Programmable as edge-triggered maskable interrupts
  • Programmable debouncer between 0..3.2s for each input

Software

Linux
13Z050-06

MDIS5 low-level driver sources (MEN) for 16Z050_BIOC

VxWorks
13Z050-06

MDIS5 low-level driver sources (MEN) for 16Z050_BIOC

QNX
13Z050-06

MDIS5 low-level driver sources (MEN) for 16Z050_BIOC

OS-9
13Z050-06

MDIS5 low-level driver sources (MEN) for 16Z050_BIOC

Documentation

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