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16Z016_IDE - IDE UDMA Controller

FPGA IP Core

The IDE UDMA Controller is an IDE controller implementation supporting ATA/ATAPI-6 standard. IDE controllers are used for data transfer between CPUs and hard disks.

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Main Features

  • FPGA IP Core
  • Supports ATA/ATAPI-6 standard
  • PIO Mode 0
  • UDMA Mode 5 (UDMA100)
  • Wishbone bus interface
16Z016_IDE Product Image

Technical Data

Size
  • Logic elements (Altera Cyclone device family): 1500 typ.
  • Pin count: 28
  • RAM: 4x M4K (Cyclone I and II) or 4x M9K (Cyclone III)
System-Bus Interface
  • Wishbone bus interface compliant with Wishbone Specification B.3
  • 32-bit data transfer, 33/66MHz bus frequency
  • Supported Wishbone bus cycles
    • Single read/write (master/slave)
    • Burst read/write (master)
IDE Functionality
  • PIO mode 0
  • UDMA mode 4 (UDMA66) (16Z016-01 only!)
  • UDMA mode 5 (UDMA100)
  • ATA/ATAPI-6 standard support

Ordering Information

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